[{"data":1,"prerenderedAt":60},["ShallowReactive",2],{"maker-_mouvantsillage":3},[4,35],{"id":5,"name":6,"line":7,"ai":8,"cat":9,"year":10,"points":11,"comments":12,"rec":13,"s":14,"top":15,"kw":16,"maker":22,"domain":23,"tier":24,"attempts":25,"strip":26,"url":27,"mix":28,"praise":32,"objection":33,"sub":34},22517538,"TablaZinc","Generate guitar tablature using a constraint solver",false,"creative",2020,109,26,"curious",0.13,20,[17,18,19,20,21],"guitar tablature","constraint solver","minizinc","fingering generator","music notation","_mouvantsillage","github.com","notable",0,"35333300000333530310005303","https:\u002F\u002Fgithub.com\u002Fsenshu\u002FTablaZinc",[29,30,25,31],3,12,1,"Interesting use case and fun project","Tabs are not captured well by MIDI; expressive playing and fingering choices vary","music tablature generator",{"id":36,"name":37,"line":38,"ai":8,"cat":39,"year":40,"points":41,"comments":42,"rec":13,"s":43,"top":44,"kw":45,"maker":22,"domain":51,"tier":24,"attempts":25,"strip":52,"url":53,"mix":54,"praise":57,"objection":58,"sub":59},26990615,"tiny-hdl","A RISC-V core in Racket","hardware",2021,122,27,0.08,17,[46,47,48,49,50],"risc-v","racket","hdl","hardware simulation","verilog","guillaume.baierouge.fr","053000033530000033300033333","http:\u002F\u002Fguillaume.baierouge.fr\u002F2021\u002F04\u002F23\u002Fsimulating-digital-circuits-in-racket\u002Fa-risc-v-core-in-racket\u002Findex.html",[55,56,31,25],2,11,"Impressive, fascinating work","Formal verification may not catch Spectre-type timing issues","hdl simulation",1794036770689]