[{"data":1,"prerenderedAt":35},["ShallowReactive",2],{"maker-fesens":3},[4],{"id":5,"name":6,"line":7,"ai":8,"cat":9,"year":10,"points":11,"comments":12,"rec":13,"s":14,"top":15,"kw":16,"maker":22,"domain":23,"tier":24,"attempts":25,"strip":26,"url":27,"mix":28,"praise":32,"objection":33,"sub":34},47937380,"Auto-Architecture","Karpathy's Loop, pointed at a CPU",false,"hardware",2026,241,76,"mixed",-0.06,5,[17,18,19,20,21],"cpu design","fpga","risc-v","llm optimization","nextpnr","fesens","github.com","notable",0,"3100103101101313513335531501355310133535","https:\u002F\u002Fgithub.com\u002FFeSens\u002Fauto-arch-tournament\u002Fblob\u002Fmain\u002Fdocs\u002Fauto-arch-tournament-blog-post.md",[29,30,31,30],9,17,3,"Verification matters: the verifier is the key idea","Not a novel idea; similar work exists (AlphaEvolve, openevolve)","cpu design automation",1794036825235]