BOOLR

Learning and science

digital logic simulator

SHOW HN2017

136points
21comments
#292of 2,242 in 2017
Top 14%of 2017 by points

How HN took it

CuriousMostly questions and neutral comments

4 positive, 5 neutral or asking, 0 mixed, 1 critical, out of 10 comments about the project. Thread score +0.28.

Execution: 1 for, 1 againstDesign: 1 for, 0 against

The thread, comment by comment

Each row is a top-level comment and its replies, in HN's order. Select a cell to open that comment on HN.

positive neutral or mixed critical about another commenter or something else the maker

What HN said

What people liked

  • Looks impressive and well done

    From 4 comments
    • Your work is amazing, very well done.
      _Codemonkeyism on HN
    • This is very impressive
      iampims on HN
    • This seems like one of the few software projects where using Electron is actually reasonable... Sorry! Couldn't resist ;) Joking aside, this looks really cool.
      Xophmeister on HN
    • Wow, this is pretty cool, I can definitely see myself using this over Quartus for experimentation. It would be even better if it supported displaying logic gates in the ANSI…
      yunyu on HN

Objections

  • Rewiring requires removing connections and rewiring manually

    From 2 comments
    • How to rewire? "Remove connection" and then wire again?
      childintime on HN
    • Yes, unfortunately there is no easier option to rewire... We will definitely make a more efficient and more stable wiring system in BOOLR 2.0 with also, for example, options to…
      GGBRW on HN

Requests

  • Export or compile to VHDL/Verilog

    From 1 comment
    • I have two questions: ``` 1. Does your code support a place where someone can implement a logic optimizer/compiler pass 2. Can you compile to VHDL/Verilog ```
      gravypod on HN
  • ANSI-style logic gate display

    From 1 comment
    • Wow, this is pretty cool, I can definitely see myself using this over Quartus for experimentation. It would be even better if it supported displaying logic gates in the ANSI…
      yunyu on HN

Questions

  • Can the full working computer be simulated?

    From 2 comments
    • Nice work. One question: were you able to simulate the full working computer (that you originally planned to make) in this simulator? And some advice: you might want to gain some…
      amelius on HN
    • Looks like they did. Take a look under "Download Boards" part of the site.
      OnACoffeeBreak on HN
  • How does it compare to Logisim?

    From 1 comment
    • This looks great! Did you try Logisim when you were trying out other tools? How does this compare? We've used Logisim for a long time teaching 61C at Berkeley (e.g.…
      sagark on HN

Alternatives named

  • Logisim

    From 3 comments
    • I also wanted to make a computer in a logic simulator. However, I found http://www.cburch.com/logisim/ was good enough for my needs. It allowed me to create a 16bit simple cpu…
      mrguyorama on HN
    • This looks great! Did you try Logisim when you were trying out other tools? How does this compare? We've used Logisim for a long time teaching 61C at Berkeley (e.g.…
      sagark on HN
    • You should try Logism!
      zeusk on HN
  • Quartus

    From 1 comment
    • Wow, this is pretty cool, I can definitely see myself using this over Quartus for experimentation. It would be even better if it supported displaying logic gates in the ANSI…
      yunyu on HN
  • QUCS

    From 1 comment
    • I've used QUCS for this purpopse, which allows inclusion of Verilog/VHDL modules via FreeHDL.
      _pmf_ on HN
  • Tk Gate

    From 1 comment
    • Its pretty old now but has anyone tried out Tk Gate?
      pkaye on HN

Category, keywords, summaries and labels on this page were made by AI (Thread Reader v2) and not checked by hand. Each point links to the comments it came from.

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